这两年啊，想换安卓的小伙伴，肯定都听过这么一段吐槽：“888 ， 8Gen1 ， X 都不买！”虽然这是一句玩笑话，但也能看得出来，这两年安卓的旗舰产品，给大家折腾的有多“爽”。发布会上的“最强性能”每年都能听到，但功耗却也飙的停不下来。
咱把时间再往前拨三年。
那时候，谁没事儿会吹自己用了多好多好的散热黑科技哦。。
但是没办法，大家骂归骂，想换安卓机也没啥别的选择。
但是吧，心里还是不由得想问一句。
高通这两年，到底为啥这么热？
发热问题不可避免
咱知道，只要做功，就一定会带来发热。
而对芯片来说，这发热则主要由动态功耗和静态功耗两部分构成。
动态功耗（ Dynamic Power ）主要指的是芯片在工作时产生的热量，包括电路的充放电，晶体管工作状态的跳变。
静态功耗（ Static Power ）主要是指芯片中各种类型的漏电流和竞争电流等等。
拿开关来举例子的话，动态功耗就像是咱们反复开关这个开关而产生的功耗。
而静态功耗就像是这个开关为了维持它当前的状态（是导通还是截止），静置在原地所产生的功耗。
那咱们做的芯片嘛。。。
自然是希望晶体管密度越来越高，对应的芯片的性能越来越强，功耗越来越低。
然而，芯片才不和你讲什么“理想”。
这几年咱们把“开关”越做越小，动态功耗的的确确是降低了不少。
但是随着芯片设计进入纳米领域之后，静态功耗的漏电问题就开始翻车，而且越来越严重。
归其原因，可以理解为“开关”做的太薄了，挡不住两边的电子“偷渡”。。。
所以想要减少这漏电呢，就需要整点新的结构，新的材料。
重新构建这又薄，又能阻挡“偷渡”的开关。
在芯片做到 28nm 的时候，这个技术就是 FinFET （鳍式场效应晶体管）。
而现在工艺慢慢做到 5nm ， FinFET 也不太管用了。
漏电水平仿佛一个圈，重新回到当年 28nm 工艺时的困境。
这时候，大家伙倒腾出来解决问题的未来新工艺，叫做 GAA （全环栅晶体管）。
这俩工艺和之前的区别，简单来讲就是从二维拓展到三维。
增大了接触范围，能够更好的控制漏电。
不过吧，可能是出于保守和以及工艺验证的原因，目前还没人用上 GAA 。
所以目前没得选，大家的 5nm 就只能继续用着老工艺 FinFET 。
缝缝补补来硬抗这漏电问题。
到底是工艺不行么？
那既然大家都是硬抗这漏电，那为啥隔壁人家隔壁苹果就可以把能耗比控制的那么好？
这就不得不提广为人知的第一个背锅侠了：
和苹果不同，高通这两代的 SoC 都是找三星代工生产。
别看三星，台积电啊都称呼自己的技术叫 5nm 。
但是在如今 FinFET 的时代，工艺的名称和芯片的物理参数其实并没有直接对应，更像是一种技术节点的称呼。
这两家 5nm 工艺做出来的晶体管密度差距，里面甚至还能塞下一个英特尔的 14 nm 。单从晶体管密度来说，台积电的 5nm 工艺可以做到在每立方毫米里摆下 1713 万个晶体管，也就是171.3 MTR。
而三星的 5nm 却只能做到126.5MTR的水平。
在这里我提一点额外的小知识，之所以在晶体管密度上有这些差别，这和两家厂商的技术迭代路线有关。
我们长话短说，对台积电来讲，我们可以理解成台积电的7nm -> 5nm是一次完整的技术迭代路线。
另一边的三星则是激进了许多，在他们的计划中，可能7nm -> 3nm才是一次完整的技术迭代，他们打算首发直接在 3nm 工艺上全新的 GAA。
所以对于三星来讲，它的 5nm 工艺相比自家的 7nm 进步就略显保守。
不过说实话，从单个晶体管的角度来讲，这点差距其实也还好。
还有人认为三星工艺的良品率也值得说道说道。
前俩月，一个新闻把托尼给看笑了…
不是，你良品率为啥低，你居然自己心里没数？？？
根据@wccftech 报道，三星晶圆代工部门在 4nm 制程上的良品率只有 35%的水平。
而还在研发中的三星 3nm GAA 技术良品率更是仅仅 10%~20%的水平。
根据 DigiTimes 报道，三星在 5nm 、 4nm 、 3nm 工艺上都存在着良品率谎报的情况。
咱甚至不清楚，现在这个良品率是谎报前，还是谎报后的数字。
也不知道是不是这个原因，吓得高通决定把 4nm 的 8 Gen1 plus 来交给台积电来代工。
哦对了，那么隔壁台积电的 4nm 工艺良品率是多少呢？
70% 。。当然了，我们在这儿分析工艺和密度差距，只能说算是在旁敲侧击的推理三星和台积电工艺的差距。
但是在托尼看来，这次发热的“黑锅”，可不能全丢给三星的代工。
还是架构顶不住？
为什么托尼觉得全都怪三星是不对的呢？
因为天玑 9000 来了。
曾经被我们寄予厚望，交给台积电代工的天玑 9000，功耗也不是非常理想。
数据来源，极客湾▼
在一些测试场景下，甚至还打不过自己的小兄弟天玑 8100。
所以。。。问题会不会是出在它们采用的 ARM 公版架构上？
托尼给大家分析一下啊，骁龙 8Gen1、天玑 9000 这两款 SoC 采用的架构都非常一致，用上了 ARM 公版的 1 + 3 + 4 的结构。
也就是 1 个 X2 超大核+3 个 A710 大核+ 4 个 A510 小核。
光看发布会上讲的性能嘎嘎顶，但是这几个核发热起来是个什么水平呢？
只能说是惨不忍睹。
在 Geekbench 5 的测试下，大核 A710的功耗能跑到 2.1w，而超大核 X2 的单核功耗甚至能突破 4w。
单单一颗核心！
要知道，当年的一代神 U ，骁龙 865 整颗 CPU 在测试下，也才只能跑到 6.7w 。。。
虽然说 8Gen1、天玑 9000 的跑分性能都上去了吧，但是这接近翻倍的发热也不是一般手机能扛得住的。
这两年托尼知道的，能压制住这散热的手机长这样：
没错，还得是往里面塞风扇。
根据其他媒体的测试，在 8Gen1 完全发力的情况下， CPU 和 GPU 的峰值功耗更是能双双突破了 10W ！
隔壁苹果这两年也有一款能突破 10w 的芯片，差友们不妨猜猜是啥？
是移动端的 M1 。
同样是 10w 功耗 ，你 M1 能干啥。。。这 8Gen1 能干啥。。。
《上帝在制造 8Gen1》▼
而且还有一个情况，现在 ARM 是对 64 位应用有优化的，高负载的情况下可以用超大核 X2 ，低负载的情况下准备了小核 A510。
所以 ARM 跑起 64 位应用的时候，要性能有性能，要功耗有功耗。
可由于安卓阵营还没根除 32 位应用，ARM仅保留了大核 A710来运行 32 位程序。
所以安卓手机一旦运行 32 位应用，不管应用负载大小，都得丢到大核 A710上跑。哪怕这个应用就是个记事本，A710也得运行。
这结果。。。不热才怪。
苹果就不一样了，从 A7 就开始自己研究架构，今年已经更新到 A15 了。
和公版的 ARM 完全不是混一条道上的。
而且，苹果也是个心狠手辣的角色，在 2017 年就把 32 位应用这个包袱给丢掉了。
所以看下来，苹果整体功耗控制得更好。
已经热了，然后呢？
咱们这一通盘点下来，可以理解为什么安卓这边的高端芯片发热这么严重了。
漏电越来越严重的制程工艺+三星的 5nm “注水” + ARM 公版架构设计太激进+ ARM 为了兼容 32 位应用而做出了牺牲。
这几套卧龙凤雏是刚刚好凑一起了。
最终造成的结果，让消费者是哑巴吃黄连。手机热的实在不行。。。
好在呢，厂商们也不是直愣愣一根筋，不知道改的人。
毕竟在探索全新工艺的路上，谁还能说自己绝不翻车呢？
台积电当年在 28nm 的时候因为工艺问题，还被人戏称为“台漏电”。
而三星所押宝的，自然是计划中的 3nm 工艺 GAA ，根据业内消息，GAA 这套工艺甚至能把制程拉到等效 1nm 都没问题。
对手机厂商来讲，大家对 32 位应用的“排斥”也是越来越明显了。行动也越来越快。
今年不少手机内置的应用商店在上架 APP 的时候，也开始强制要求开发者同时上传 32 位和 64 位的应用，大家都用上 64 为应用，那大核浪费现象也就没了。
现在，高通更是以 14 亿美元收购了 Apple 前首席架构师 Gerard Williams 成立的初创公司 Nuvia 。
虽然距离重新组建自己的架构自研团队还有些距离。
但也是希望能借助他们团队的研发经验，来减少自己对 ARM 架构的依赖，有朝一日，高通自己的芯片赶上苹果也不是不可能。
顺带一提，接下来没几天，就是高通的新产品发布会了。
到时候带来的产品，就算不是大家心心念念的 8 Gen1 Plus ，也多半是台积电代工的新芯片。
虽然大家目前普遍不太看好 ARM 这次的架构。
但是指不定，这回台积电能超常发挥，能给咱们带来惊喜呢？
图片、资料来源：
部分图片来自于互联网
部分数据来自于极客湾
三星4nm为什么不如台积电4nm？
数字IC后端设计工程师修炼之路 | 阎浮提
https://www.qualcomm.com/news/releases/2021/01/13/qualcomm-acquire-nuvia
https://zh.wikipedia.org/zh-mo/FinFET
https://m.eprice.com.tw/mobile/talk/102/5717005/1/
深度分析 | 5nm芯片为何集体翻车?10年前困扰台积电三星的问题又回来了 – 芯合汇
Let’s move the time forward another three years.
At that time, who could brag about how much good cool techs they used? no, no, no.
But there is no way, everyone scolded, want to change the Android machine also has no other choice.
But, I can’t help but ask a question.
Why on earth is Qualcomm so hot in the past two years?
Fever is inevitable & nbsp
We know that as long as we do work, it will certainly bring fever.
For the chip, the heating is mainly composed of dynamic power consumption and static power consumption.
Dynamic power consumption(Dynamic Power) mainly refers to the heat generated when the chip is working, including the charge and discharge of the circuit and the jump of the working state of the transistor.
Static power consumption(Static Power) mainly refers to various types of leakage current and competitive current in the chip.
In the case of a switch, for example, dynamic power consumption is like the power consumption generated by switching this switch repeatedly.
The static power consumption is like the power consumption generated by the switch standing still in place in order to maintain its current state (& nbsp; on or off & nbsp;).
What about the chip we made.
Naturally, it is hoped that the density of the transistor is getting higher and higher, the performance of the corresponding chip is getting stronger and stronger, and the power consumption is getting lower and lower.
However, the chip doesn’t tell you anything & nbsp; “& nbsp; ideal & nbsp;” & nbsp;.
In recent years, we have made & nbsp; “& nbsp; switch & nbsp;” & nbsp; smaller and smaller, and the dynamic power consumption has indeed been reduced a lot.
However, as the chip design enters the nanometer field, the leakage problem of static power consumption begins to turn over, and it becomes more and more serious.
The reason can be understood as & nbsp; “& nbsp; switch & nbsp;” & nbsp; is too thin to block the electrons on both sides & nbsp; “& nbsp; illegal immigration & nbsp;” & nbsp;.
So if you want to reduce this leakage, you need a whole new structure and new materials.
Rebuilding this is thin and can block the switch of nbsp; “& nbsp; illegal immigration & nbsp;” & nbsp;.
When the chip achieves 28nm, this technology is FinFET (& nbsp; fin field effect transistor & nbsp;).
And now the process is slowly achieving 5nm, FinFET is not very effective.
The leakage level is like a circle, returning to the dilemma of the 28nm process at that time.
At this time, the future new process that big guys come up with to solve the problem is called GAA (& nbsp; full-gate transistor & nbsp;).
The difference between these two processes and the previous process, simply speaking, is to expand from two-dimensional to three-dimensional.
The contact range is enlarged and the leakage can be better controlled.
However, probably because of conservatism and process verification, no one has used GAA yet.
So at present, there is no choice, so everyone’s 5nm can only continue to use the old process FinFET.
Sewing and mending to resist the leakage problem.
Is it the craftsmanship?
Well, since everyone is resistant to this leakage, why can the apple next door control the energy consumption so well?
So we have to mention the first well-known scapegoat:
Unlike Apple, both generations of Qualcomm’s SoC are made by Samsung.
Despite Samsung and TSMC, they all call their technology 5nm.
But in today’s FinFET era, the name of the process does not directly correspond to the physical parameters of the chip, more like the name of a technology node.
The transistor density gap between the two 5nm processes can even hold an Intel 14 nm. In terms of transistor density alone, TSMC’s 5nm process can place 17.13 million transistors per cubic millimeter, that is, nbsp;171.3 MTR.
However, Samsung’s 5nm can only achieve the level of nbsp;126.5MTR.
Here I would like to mention a little extra knowledge that the reason why there are these differences in transistor density has something to do with the technical iterative routes of the two manufacturers.
To make a long story short, for TSMC, we can understand that TSMC’s & nbsp;7nm-& gt; 5nmyognbsp; is a complete technical iteration route.
Samsung, on the other hand, is much more aggressive, and in their plan, perhaps & nbsp;7nm-& gt; 3nmprogresnbsp; is a complete technical iteration, and they intend to launch a new GAA directly in the 3nm process.
So for Samsung, its 5nm process is a little more conservative than its own 7nm.
But to be honest, from a single transistor point of view, this gap is actually not bad.
Others think that the quality rate of Samsung craftsmanship is also worth talking about.
Two months ago, a news report made Tony laugh.
No, why is your good product rate so low that you don’t count it in your mind?
According to & nbsp;@wccftech, the Samsung wafer foundry department has a quality rate of only 35% in the 4nm process.
Samsung 3nm GAA, which is still under development, has a quality rate of only 10% or 20% nbsp;.
According to DigiTimes, Samsung has lied about the rate of quality products in its 5nm, 4nm and 3nm processes.
We don’t even know whether the current rate of good products is before or after the false report.
I don’t know if this is the reason, so Qualcomm decided to hand over 8 Gen1 plus of 4nm to TSMC for OEM.
Oh, by the way, what is the yield of the 4nm process of TSMC next door?
70%. Of course, when we analyze the gap between process and density here, we can only say that we are inference about the gap between Samsung and TSMC.
But in Tony’s view, the feverish & nbsp; “& nbsp; blamed & nbsp;” & nbsp;, cannot be left to Samsung’s contract manufacturers.
Or the architecture can’t stand it?
Why does Tony think it’s wrong to blame Samsung?
Because Tianji 9000 is coming.
TSMC has placed high hopes on TSMC, and the power consumption of TSMC is not very ideal.
Data source, Geek Bay
In some test scenarios, I can’t even beat my little brother Tianji 8100mm nbsp;
So… Could the problem lie in the ARM public domain architecture they adopt?
Tony to give you an analysis, ah, Snapdragon 8Gen1, Tianji 9000 these two SoC architecture is very consistent, using the ARM public version of the 1 + 3 + 4 structure.
That is, 1 X2 super large nucleus + 3 A710 large nuclei + 4 A510 small nuclei.
Just look at the performance mentioned at the press conference, but what is the level of heat generated by these cores?
It can only be said to be horrible.
Under the test of Geekbench 5, the power consumption of large core A710 microwave nbsp; can run to 2.1w, while the single-core power consumption of super-large core X2 can even exceed 4w.
A single core!
You know, that year’s generation of god U, Snapdragon 865 the whole CPU can only run to 6.7w under the test.
Although it is said that the running performance of 8Gen1 and Tianji 9000 has gone up, but this nearly doubling fever is not something that ordinary mobile phones can bear.
What Tony has known for the past two years, the cell phone that can suppress the heat dissipation looks like this:
That’s right, and you have to put a fan in it.
According to the tests of other media, when the 8Gen1 is fully powered, the peak power consumption of CPU and GPU can both break through 10W!
Next door Apple also has a chip that can break 10w in the past two years. Guess what it is.
It is M1 on the mobile side.
With the same 10w power consumption, what can you do with M1. What can this 8Gen1 do?
“God is making 8Gen1.”
And there is another case, ARM is now optimized for 64-bit applications, large core X2 can be used in the case of high load, and small core A510 has been prepared in the case of low load.
So when ARM runs 64-bit applications, it should have performance, power consumption and power consumption.
But since the Android camp has not yet eradicated 32-bit apps, ARM has only retained the large core A710 roomnbsp; to run 32-bit programs.
So once Android phones run 32-bit apps, regardless of the size of the application load, they have to be dropped to the big core A710 upstream. Even if the app is a notepad, A710roomnbsp; has to run.
The result. No wonder it’s hot.
Apple is different. It has been working on its own architecture since A7 and has been updated to A15 this year.
And the public domain ARM is not in the same way at all.
What’s more, Apple is also a ruthless character, throwing away the burden of 32-bit apps in 2017.
So from a glance, Apple’s overall power consumption is better controlled.
It’s already hot, and then what?
After taking an inventory, we can understand why the high-end chips on the Android side are so hot.
Nbsp;+ Samsung’s 5nm “& nbsp; Water injection & nbsp;” + ARM public domain architecture design is too radical & nbsp;+ ARM has made sacrifices to be compatible with 32-bit applications.
These sets of lying dragon and Phoenix chicks are just right together.
The final result is that consumers are dumb to eat Coptis chinensis. The cell phone is really hot.
Fortunately, manufacturers are not single-minded and do not know how to change.
After all, who can say that he will never turn over on the way to explore a new process?
When TSMC was in 28nm that year, it was jokingly called & nbsp; “& nbsp; leakage & nbsp;” & nbsp; because of technological problems.
What Samsung is betting on is naturally the planned 3nm process GAA. According to industry sources, the GAA process can even pull the process to the equivalent 1nm.
For mobile phone manufacturers, the 32-bit application & nbsp; “& nbsp; exclusion & nbsp;” & nbsp; is also becoming more and more obvious. And moving faster and faster.
When many mobile phone built-in app stores launched APP this year, they also began to force developers to upload 32-bit and 64-bit apps at the same time, and everyone used 64-bit apps, so the big core waste was gone.
Now Qualcomm has bought Nuvia, a startup founded by Gerard Williams, a former chief architect of Apple, for $1.4 billion.
Although there is still some way to re-establish their own architecture self-research team.
But it is also hoped that their team’s research and development experience can be used to reduce their dependence on ARM architecture, and it is not impossible for Qualcomm’s own chips to catch up with Apple one day.
By the way, Qualcomm’s new product launch will be in the next few days.
The products that will be brought at that time, if not the 8 Gen1 Plus that everyone has in mind, are mostly new chips made by TSMC.
Although people are generally not optimistic about the structure of ARM this time.
But it is uncertain, this time Taiwan accumulates electricity to play excessively, can bring the surprise to us?
Pictures, data sources:
Some of the pictures are from the Internet.
Some of the data come from Geek Bay.
Why is Samsung 4nm inferior to TSMC 4nm?
Digital IC back-end Design engineer’s way to practice | Yan Futi
https://www.qualcomm.com/news/releases/2021/01/13/qualcomm-acquire-nuvia
https://zh.wikipedia.org/zh-mo/FinFET
https://m.eprice.com.tw/mobile/talk/102/5717005/1/
In-depth analysis | Why did the 5nm chip turn over collectively? the problem that plagued TSMC Samsung 10 years ago is back.
相关文章