Samsung announced today it has begun mass production of system-on-a-chip (SoCs) based on its 10nm process node. The company is claiming a technological first over rivals like TSMC and Intel, and believes devices with its 10nm technology could ship early in 2017, though the firm states that availability will generally improve throughout the year.
According to Samsung, its 10nm LPE (Low Power Early) process node will offer “up to 30-percent increase in area efficiency with 27-percent higher performance or 40-percent lower power consumption.” That “or” is important in this context, because it represents the degree to which manufacturers now have to make narrow trade-offs between performance and power consumption. Consider this, from Samsung’s own page on its 45nm technology :
“The 45nm technology doubles gate density of the 65nm process with the significant low power and low manufacturing cost that is 50% linear shrink in addition to 15% speed enhancements and 35% active power reduction.”
Or this, from the company’s page on its 32nm process node . “32nm HKMG process boasts up 30% higher speed, 30% less power, 30% scaling with twice of SRAM density over 45nm technology, making it ideal for high performance mobile applications.”
In the old days, manufacturers were able to serve up gate density improvements, power consumption gains, and higher clock speeds at the same time. Nowadays, you get to pick 1-2 of those features to emphasize and, if you’re lucky, you don’t have to reduce the third to compensate. This is one reason why manufacturers have introduced the concept of hybrid nodes, and of long-lived versus short-lived nodes — it doesn’t make sense for all companies to push for each and every advance in the semiconductor market. Some firms continue pushing into every new node for SoCs (Apple, Samsung Exynos, Qualcomm). Other components, like GPUs, are hopping between nodes, targeting the ones that make the most sense. Neither AMD nor Nvidia have said anything about whether they will adopt 10nm; the products that we know of scheduled for early 2017 are still built on 14nm hardware.
Industry predictions, features diverge
In the past, when node shrinks were more uniform, there was broad agreement in the industry about the features and characteristics of any given node. This is no longer the case.Samsung is positioning its 10nm node as a long-lived node and a successor to 28nm, whileTSMC intends to focus on 7nm as its next major deployment, with relatively limited rollout on 10nm. GlobalFoundries is also skipping 10nm , with a focus on pushing directly for 7nm. Each foundry has different technology and follows different design rules, which is one reason why you can’t easily port designs from one foundry to another. But also makes it more difficult to cleanly compare their respective solutions.
Image by Anandtech
Samsung intends to start rolling out 10nm LPP next year, as the follow-up to 10nm LPE, just as its modern 14nm LPP is a follow-up to the 14nm LPE that debuted in 2015. Intel isn’t expected to have 10nm ready until mid-2017, but its die shrinks have traditionally been smaller than its competitors. Whether this makes Intel’s process technology “better” is a complicated question that depends on your point of view. Historically, Intel has had difficulty competing against the merchant foundries within relevant price brackets. One might fairly say that outside of its contra-revenue shipments, Intel chips have tighter manufacturing tolerances and smaller feature sizes in some cases, but also tend to cost significantly more .
The one thing we can predict about the future ofsemiconductor manufacturing, assuming that GF, Intel, Samsung, and TSMC pull off their respective roadmaps, is that node names will encapsulate even less relative information — and we’ll have to dig deeper into design rules and specifications to accurately capture the differences between these technologies. The companies are all pursuing different strategies to their 10nm and 7nm targets, and until we see some apples-to-apples comparisons it’s difficult to predict who will have an edge on any given process node.